1. Technical Field
This invention generally relates to semiconductor processing, and more specifically relates to the alignment of a semiconductor wafer with a mask during processing.
2. Background Art
Today, our society is heavily dependant on high-tech electronic devices for everyday activity. Integrated circuits are the components that give life to our electronic devices. Integrated circuits are found in widespread use throughout the world, in appliances, in televisions and personal computers, and even in automobiles. Additionally, modern manufacturing and production facilities are becoming increasingly dependent on the use of machines controlled by integrated circuits for operational and production efficiencies. Indeed, in many ways, our everyday life could not function as it does without integrated circuits. These integrated circuits are manufactured in huge quantities in our country and abroad. Improved integrated circuit manufacturing processes have led to drastic price reductions and performance enhancements for these devices.
The traditional integrated circuit fabrication process is a series of steps during which a geometric pattern or set of geometric patterns is created to form an operational integrated circuit. An integrated circuit consists of superimposed layers of conducting, insulating, and device-forming materials. By arranging predetermined geometric shapes in each of these layers, an integrated circuit that performs the desired function may be constructed. The overall fabrication process consists of the patterning of a particular sequence of successive layers. The layers and regions are arranged to form electronic components or devices such as transistors, diodes, and capacitors. Thousands of these devices are formed essentially simultaneously on the surface of a single wafer of semiconductor material during processing.
The overall process of forming integrated circuits on the surface of wafers is heavily dependent on photo processing techniques such as photolithography. Each layer is formed using one or more masks that define areas of the semiconductor wafer that require processing during one or more subsequent steps. As the scale of integrated circuits continues to be reduced, the ability to align the mask to a precise position on the semiconductor wafer becomes more critical.
Alignment targets are well known in the art, and provide a way for a stepper machine to position a mask at the desired location above a semiconductor wafer. Alignment targets are typically formed of metal during the processing steps that define the geometric shapes in the first metal layer. The alignment targets typically have oxide surrounding the metal portion. The metal layer in the alignment targets is more reflective than the adjacent oxide, resulting in a contrast that may be optically detected by a machine that positions a mask above the semiconductor wafer. The contrast results from the difference in the reflectivity of the metal and the reflectivity of the adjacent oxide.
One factor that can severely affect the reflectivity of the region adjacent the alignment targets and of the metal layer that comprise the alignment targets is the thickness of the oxide. The alignment system typically uses a single wavelength illumination source that is sensitive to thin film interference effects caused by variations in the thickness of the oxide. The oxide may actually be stacked, with a first oxide layer fabricated during one step and one or more additional oxide layers fabricated on top of the first oxide layer during other steps. The reflectivity of the region surrounding the alignment target is a function of the thickness of the oxide in this region, while the reflectivity of the metal region that comprises the alignment target is also a function of the oxide overlying the alignment target. With variations in oxide thickness across a single wafer, from wafer to wafer, and from one batch of wafers to the next, the stepper machine that aligns the mask may see a wide variance in reflectivity (i.e., a large range of contrast). This variance in reflectivity may result in the stepper machine interpreting a variation in reflectivity caused by noise as an alignment target, resulting in improper positioning of the mask.
Other factors also result in varying contrast between alignment targets and the adjacent oxide. Referring now to FIG. 1, during a particular semiconductor process, a semiconductor wafer 100 comprises a substrate 110, a metal layer 120, a titanium nitride (TiN) layer 130, and a layer of photoresist 140. This structure is formed by depositing metal layer 120 over all of substrate 110 on the semiconductor wafer, then depositing TiN layer 130 over metal layer 120, then applying photoresist 140. A mask is then used to expose resist 140 to the desired pattern of light. Resist 140 is then developed, thereby removing portions of resist layer 140 where the metal layer is to be removed. An etching step is then used to remove TiN layer 130 and metal layer 120, resulting in a desired pattern of metal on the semiconductor wafer. This resultant pattern includes alignment targets to assure subsequent masks are properly aligned to the wafer.
The TiN layer 130 is an anti-reflective coating deposited atop metal layer 120. By providing an anti-reflective coating, less light is reflected back through the resist and toward the mask. As a result, the photoresist is more precisely patterned after applying the TiN layer 130 than was previously possible without applying the TiN layer 130. For a photoresist light source of 365 nm, using a TiN layer of 35 nm during the initial patterning of the first metal layer results in improved definition and accuracy in the metal layer. Next we examine the result of adding the TiN layer on subsequent processing steps.
Referring to FIG. 2, a structure 200 results after several processing steps are performed to the structure 100 of FIG. 1. As described above, the resist layer 140 on structure 100 is exposed through a mask, developed, and the underlying metal layers are etched, resulting in portions 240 that remain after etching. Next, an oxide layer is provided, and the entire structure is planarized to bring the top of oxide portions 210 to the same height as the top of metal portions 240. Next, another oxide layer 220 is deposited. At this point, resist 230 is placed on top of oxide 220 for the next patterning step. Another mask must be aligned to the semiconductor wafer, and alignment targets are used for this purpose. Note, however, that the light source for identifying the location of the alignment targets typically uses visible light, e.g., a wavelength of 633 nm. This light source is considerably different than light sources used to expose photoresist, which commonly have wavelengths of 248 nm, 365 nm, and 436 nm. For a 365 nm photoresist light source, the 35 nm layer of TiN that helped in the previous step of exposing the photoresist layer 140 of FIG. 1 is now negatively affecting the reflectivity of the metal layer. In essence, the anti-reflective TiN coating is partially reducing the natural reflectivity of the metal layer. The thicker the coating, the less reflective the metal layer appears. The metal layer contains the alignment targets, so the anti-reflective TiN coating that served a useful purpose in the initial formation of the first metal layer now makes it more difficult for a stepper machine to accurately align the next mask to the semiconductor wafer. Therefore, there exists a need to enhance the contrast between alignment targets and adjacent materials to assure more accurate positioning of a mask.